Difference between revisions of "TouchLine station microprocessor, version 0161"
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|PB3 || Common line for all digit only keys. The output is taken low when digit only keys are scanned. ''In matrix keyboard mode, this is row address 3.'' | |PB3 || Common line for all digit only keys. The output is taken low when digit only keys are scanned. ''In matrix keyboard mode, this is row address 3.'' | ||
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− | |PB4 | + | |PB4<br\><br\><br\> || Common line for digit + current keys. The output is taken low when digit + current keys are scanned. |
When data has been shifted out on the SPI, it is latched by taking both PB3 and PB4 low. Since PB3 and PB4 may be shorted together if more than one key is pressed, PB3 and PB4 should be buffered in circuits using the SPI output. ''In matrix keyboard mode, this is row address 2.'' | When data has been shifted out on the SPI, it is latched by taking both PB3 and PB4 low. Since PB3 and PB4 may be shorted together if more than one key is pressed, PB3 and PB4 should be buffered in circuits using the SPI output. ''In matrix keyboard mode, this is row address 2.'' |
Revision as of 09:16, 13 August 2007
Overwiew
General
The microprocessor is a Motorola 68HC05C4 mask programmed processor. It operates in different modes in stations with display and stations without display. The processor decides its operating mode by reading the pin PB0 after reset. If it is 0, the processor starts the display mode, if it is 1, the processor selects the non-display mode.
New features in the revised version 0159 are indicated by italics.
Display mode
In a station with display, the processor scans the keyboard every 10 ms and processes data received from the serial line. The processor is in the WAIT state between messages and scans to conserve power. The processor can scan up to 60 keys. The processor will signal the key by generating the digit tone and selecting the right ab loop current. All signalling is held for a minimum time even if the key is released to ensure that the exchange is able to receive it properly. In the display station, the M-key, C-key and Handset Off current levels are also controlled by the processor.
There is also options for scanning of a matrix keyboards, either in normal mode or in MICOM mode. M- and C-keys are then included in the scanned keyboard matrix.
The processor can output received data to a LCD display. It can also output data on the SPI port. The processor can set or reset an output line that is used to override handset off/volume setting. In addition, one extra output can be set or reset, alternatively set with timeout. This is primarily intended for door opening.
Non-display mode
In a station without display, the processor is in STOP condition when no key is pressed. The processor is started by a depressed key and continues to run until the last key is signalled to the exchange. The processor generates the digit tone and selects M-key current if necessary. The digit tone and current are held for a minimum time even if the key is released. In non-display mode, the processor can scan 40 keys.
There is also options for scanning of a matrix keyboards, either in normal mode or in MICOM mode. M- and C-keys are then included in the scanned keyboard matrix.
Pin usage
Display mode
The pins are used as follows:
Pin Name | Description |
---|---|
RESET | This is the reset input, the watchdog is connected to this input. |
OSC1,<br\>OSC2 | A 2.45MHz ceramic resonator is connected to these two pins. <br\> |
VCC | The pin is connected to +5V. |
GND | The pin is connected to 0V. |
IRQ | The pin is not used and should be connected to +5V. |
PA0..PA7 | This 8 bit port is used as bi-directional data bus with the display. It is also used as address bus when data is shifted out on the SPI output. |
PB0 | At start-up, this input should read 0 to indicate that the processor should start display mode. Afterwards, it is used as E signal for the display. |
PB1 | R/W* signal for the display. |
PB2 | A0 signal for the display. |
PB3 | Common line for all digit only keys. The output is taken low when digit only keys are scanned. In matrix keyboard mode, this is row address 3. |
PB4<br\><br\><br\> | Common line for digit + current keys. The output is taken low when digit + current keys are scanned.
When data has been shifted out on the SPI, it is latched by taking both PB3 and PB4 low. Since PB3 and PB4 may be shorted together if more than one key is pressed, PB3 and PB4 should be buffered in circuits using the SPI output. In matrix keyboard mode, this is row address 2. |