CRM IV - Display data protocol
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General The microprocessor receives messages on the asynchronous serial input. First, the message is checked for errors in transmission using the checksum. Then the processor decides whether the message is addressed to this station. Last the data bytes in the message are sent to the display, the synchronous output, the asynchronous output or as digits back to the exchange, depending on the command type. Serial format The serial format is 8 bit, no parity, 2 stop bits, 9600 baud. Message format The message consists of the following items:
- A start of record mark, one byte. Always 0xa5.
- Byte count. One byte giving the number of bytes in the rest of the record. The count starts at the next byte and includes the checksum byte at the end of the record.
- Address. Two bytes telling for who this record is intended. The most significant byte comes first.
- Command type. One byte telling what the message is about.
- Data. Up to 18 bytes of data.
- Checksum. One byte checksum of record, obtained by adding count byte, address bytes, command byte and data bytes, ignoring any carry.
Addresses The processor has three different address registers that it tries to match against the address of the incoming message:
- The 16 bit main address register that is loaded by a message. The register may be loaded by a message that requires a double pulse on the polarity of the cd wire. The register is set to 0xff00 after full reset.
- The 8 bit K-group address register that can be loaded by a message.
The address range of the incoming messages is divided as follows:
| Address | Interpretation |
|---|---|
| 0x0000 - 0xfbff | The address is compared directly with the 16 bit main address register. |
| 0xfc00 - 0xfcff | The lower 8 bits are compared with the short address register. |
| 0xfd00 - 0xfdff | The lower 8 bits are compared with the K-group address register. |
| 0xfe00 - 0xfeff | The lower 8 bits are compared with the upper 8 bits of the main address register. The processor have 0xff00 in the main address register after reset so that 0xfeff is group broadcast to all processors whose main address register is not yet loaded. |
| 0xfffe | Maskable broadcast to all processors. |
| 0xffff | Unmaskable broadcast to all processors. |
Commands
The command byte tell the processor what to do. Not all commands will be supported by all systems, refer to individual product specifications for details.
| Command | Action description |
|---|---|
| 0x01 | Write data in message to low address (control register of display). Wait for display to become ready for each byte. |
| 0x02 | Write data to high address (display RAM and character generator of display). Wait for display to become ready for each byte. |
| 0x03 | Write data in message to high address, but interpret values in the range 0x10 .. 0x1f as control codes. Wait for display to become ready for each byte. |
| 0x04 | Load the main address register with the two first data bytes of message if the processor has received two pulses on the PD7 pin within a short time (less than one second). This is a double flash in the station LED and the sequence on the PD7 pin is 1-0-1-0-1. The first 1 must be present when the message is processed, meaning that the LED must be off. Most significant byte is first data byte. |
| 0x05 | Load the first data byte as the K-group address. |
| 0x06 | Write data bytes in message to low address. |
| 0x07 | Write data bytes in message to high address. |
| 0x08 | Load the short address register from port A (PA0..PA7). |
| 0x09 | Mask broadcast. Messages with address 0xfffe is ignored. |
| 0x0a | Unmask broadcast. Messages with address 0xfffe is recognised. |
| 0x0b | Shift 0xff out to SPI address 0x02. This command is for compatibility with old version of display station processor only. |
| 0x0c | Shift 0x00 out to SPI address 0x02. This command is for compatibility with old version of display station processor only. |
| 0x0d | Shift first data byte out to address 0x00. This command is for compatibility with old version of display station processor only. |
| 0x0e | Shift first data byte out to address 0x01. This command is for compatibility with old version of display station processor only. |
| 0x20 | Shift data in message out to specified SPI addresses. Data and addresses comes in pairs, first one byte of address then one byte of data. Since at most 18 bytes may be sent in one message, one message can load up to 9 external registers. |
| 0x21 | Transmit data bytes in message on asynchronous output (9600 baud, 2 stop bit, no parity, 8 bit data). |
| 0x22 | Use the data bytes in message as key presses, send them as digits on the cd wires. Key value 20 gives ID+specified current, key values 21-30 gives current pulse only, 31 gives C-key pulse. |
| 0x23 | Set the PB5 pin to 5V to override handset off and volume control. |
| 0x24 | Clear the PB5 pin to 0V, removing handset off and volume override. |
| 0x25 | Load the main address register with the two first data bytes of the message without looking for any pulses on PD7 pin. Most significant byte is first data byte. |
| 0x26 | Activate PD1/TDO (low). |
| 0x27 | Deactivate PD1/TDO (high). |
| 0x28 | Activate PD1/TDO (low) with timeout given by data byte. Timeout is given by hex value times 100 ms. |
| 0x29 | Start pulse train on PD1/TDO. First data byte gives on-time, second data byte gives off-time, and third data byte gives number of pulses (max 127 = 0x7f). Times are given by hex value times 100 ms. |
| 0x2a | Same as 0x22, but four-digit version number is appended. |
| 0x2e | Activate watchdog reset, processor dials own identity (directory number) if programmed, when coming alive. |
| 0x2f | Stop activities in microcontroller to start watchdog reset. |
Control codes as used in command 0x03
When sending a message with command 0x03, the processor writes the data bytes to the display high address. However, bytes in the range 0x10 to 0x1f is interpreted as control codes.
| Code | Action description |
|---|---|
| 0x10 | Clear display. |
| 0x11 | Move cursor to start of first line. |
| 0x12 | Move cursor to start of second line. |
| 0x13 | Position cursor. Use the following byte as the new cursor address. Range is 0x00..0x7f. Refer to HD44780 data sheet for details. |
| 0x14 | The following byte is written to low address rather than high address. |
| 0x15 | Mask broadcast. Messages with address 0xfffe will be ignored. |
| 0x16 | Unmask broadcast. Records with address 0xfffe will be recognised. |
Dialling format, frequencies and currents.
The following format is used for key data in command type 0x22, for frequencies and for currents when dialling numbers:
| Key value | Frequency | Current | Name |
|---|---|---|---|
| 0x00 | 500 Hz | Handset on | Digit 0 |
| 0x01 | 700 Hz | Handset on | Digit 1 |
| 0x02 | 900 Hz | Handset on | Digit 2 |
| 0x03 | 1100 Hz | Handset on | Digit 3 |
| 0x04 | 1300 Hz | Handset on | Digit 4 |
| 0x05 | 1500 Hz | Handset on | Digit 5 |
| 0x06 | 1700 Hz | Handset on | Digit 6 |
| 0x07 | 1900 Hz | Handset on | Digit 7 |
| 0x08 | 2100 Hz | Handset on | Digit 8 |
| 0x09 | 2300 Hz | Handset on | Digit 9 |
| 0x0a | 400 Hz | Handset on | Digit 10 |
| 0x0b | 2600 Hz | Handset on | Digit 11 |
| 0x0c | 450 Hz | Handset on | Digit 12 |
| 0x0d | 2900 Hz | Handset on | Digit 13 |
| 0x0e | 600 Hz | Handset on | Digit 14 |
| 0x0f | 3200 Hz | Handset on | Digit 15 |
| 0x10 | 800 Hz | Handset on | Digit 16 |
| 0x11 | 3600 Hz | Handset on | Digit 17 |
| 0x12 | 1000 Hz | Handset on | Digit 18 |
| 0x13 | 4000 Hz | Handset on | Digit 19 |
| 0x14 | No tone | Handset on | ID-pulse |
| 0x15-0x1e | No tone | Handset on | No action |
| 0x1f | No tone | C key | C key pulse |
| 0x20 | 500 Hz | M key | M + Digit 0 |
| 0x21 | 700 Hz | M key | M + Digit 1 |
| 0x22 | 900 Hz | M key | M + Digit 2 |
| 0x23 | 1100 Hz | M key | M + Digit 3 |
| 0x24 | 1300 Hz | M key | M + Digit 4 |
| 0x25 | 1500 Hz | M key | M + Digit 5 |
| 0x26 | 1700 Hz | M key | M + Digit 6 |
| 0x27 | 1900 Hz | M key | M + Digit 7 |
| 0x28 | 2100 Hz | M key | M + Digit 8 |
| 0x29 | 2300 Hz | M key | M + Digit 9 |
| 0x2a | 400 Hz | M key | M + Digit 10 |
| 0x2b | 2600 Hz | M key | M + Digit 11 |
| 0x2c | 450 Hz | M key | M + Digit 12 |
| 0x2d | 2900 Hz | M key | M + Digit 13 |
| 0x2e | 600 Hz | M key | M + Digit 14 |
| 0x2f | 3200 Hz | M key | M + Digit 15 |
| 0x30 | 800 Hz | M key | M + Digit 16 |
| 0x31 | 3600 Hz | M key | M + Digit 17 |
| 0x32 | 1000 Hz | M key | M + Digit 18 |
| 0x33 | 4000 Hz | M key | M + Digit 19 |
| 0x34 | No tone | M key | M + ID-pulse |
| 0x35-0x3e | No tone | M key | M pulse |
| 0x3f | No tone | C key | C key pulse |
| 0x40 | 500 Hz | Handset off | Handset off + Digit 0 |
| 0x41 | 700 Hz | Handset off | Handset off + Digit 1 |
| 0x42 | 900 Hz | Handset off | Handset off + Digit 2 |
| 0x43 | 1100 Hz | Handset off | Handset off + Digit 3 |
| 0x44 | 1300 Hz | Handset off | Handset off + Digit 4 |
| 0x45 | 1500 Hz | Handset off | Handset off + Digit 5 |
| 0x46 | 1700 Hz | Handset off | Handset off + Digit 6 |
| 0x47 | 1900 Hz | Handset off | Handset off + Digit 7 |
| 0x48 | 2100 Hz | Handset off | Handset off + Digit 8 |
| 0x49 | 2300 Hz | Handset off | Handset off + Digit 9 |
| 0x4a | 400 Hz | Handset off | Handset off + Digit 10 |
| 0x4b | 2600 Hz | Handset off | Handset off + Digit 11 |
| 0x4c | 450 Hz | Handset off | Handset off + Digit 12 |
| 0x4d | 2900 Hz | Handset off | Handset off + Digit 13 |
| 0x4e | 600 Hz | Handset off | Handset off + Digit 14 |
| 0x4f | 3200 Hz | Handset off | Handset off + Digit 15 |
| 0x50 | 800 Hz | Handset off | Handset off + Digit 16 |
| 0x51 | 3600 Hz | Handset off | Handset off + Digit 17 |
| 0x52 | 1000 Hz | Handset off | Handset off + Digit 18 |
| 0x53 | 4000 Hz | Handset off | Handset off + Digit 19 |
| 0x54 | No tone | Handset off | Handset off + ID-pulse |
| 0x55-0x5e | No tone | Handset off | Handset off pulse |
| 0x5f | No tone | C key | C key pulse |