Difference between revisions of "TouchLine station microprocessor, version 0161"
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| + | == Electrical operation == | ||
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| + | === Keyboard scanning in display mode === | ||
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| + | The keyboard is a 2 x 30 switch matrix, giving two columns of 30 keys that is scanned one column at a time. The processor always scans 30 keys, but keys may be disabled by ensuring that they read as logic 1. The first column is selected by taking the PB3 pin low. The two first keys are read by reading level at the pins PC0 and PC1. Then the PC0 pin is made an output and taken high then low to latch the rest of the keys into external shift registers. The PB3 pin is taken high and the data in the external shift registers is shifted in through the processor's SPI port using the SCK output as clock. The clock is 306 kHz. After the keys has been decoded internally, the process is repeated for the second column, selecting the second column by taking PB4 pin low. | ||
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| + | If an error is detected during scanning, that is, more than one key pressed at a time, the scanning may be aborted. ''An exception is M- and C-key in matrix keyboard mode.'' | ||
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| + | The keys are placed as follows in the matrix: | ||
Revision as of 10:45, 13 August 2007
Contents
Overwiew
General
The microprocessor is a Motorola 68HC05C4 mask programmed processor. It operates in different modes in stations with display and stations without display. The processor decides its operating mode by reading the pin PB0 after reset. If it is 0, the processor starts the display mode, if it is 1, the processor selects the non-display mode.
New features in the revised version 0159 are indicated by italics.
Display mode
In a station with display, the processor scans the keyboard every 10 ms and processes data received from the serial line. The processor is in the WAIT state between messages and scans to conserve power. The processor can scan up to 60 keys. The processor will signal the key by generating the digit tone and selecting the right ab loop current. All signalling is held for a minimum time even if the key is released to ensure that the exchange is able to receive it properly. In the display station, the M-key, C-key and Handset Off current levels are also controlled by the processor.
There is also options for scanning of a matrix keyboards, either in normal mode or in MICOM mode. M- and C-keys are then included in the scanned keyboard matrix.
The processor can output received data to a LCD display. It can also output data on the SPI port. The processor can set or reset an output line that is used to override handset off/volume setting. In addition, one extra output can be set or reset, alternatively set with timeout. This is primarily intended for door opening.
Non-display mode
In a station without display, the processor is in STOP condition when no key is pressed. The processor is started by a depressed key and continues to run until the last key is signalled to the exchange. The processor generates the digit tone and selects M-key current if necessary. The digit tone and current are held for a minimum time even if the key is released. In non-display mode, the processor can scan 40 keys.
There is also options for scanning of a matrix keyboards, either in normal mode or in MICOM mode. M- and C-keys are then included in the scanned keyboard matrix.
Pin usage
Display mode
The pins are used as follows:
| Pin Name | Description |
|---|---|
| RESET | This is the reset input, the watchdog is connected to this input. |
| OSC1,<br\>OSC2 | A 2.45MHz ceramic resonator is connected to these two pins. <br\> |
| VCC | The pin is connected to +5V. |
| GND | The pin is connected to 0V. |
| IRQ | The pin is not used and should be connected to +5V. |
| PA0..PA7 | This 8 bit port is used as bi-directional data bus with the display. It is also used as address bus when data is shifted out on the SPI output. |
| PB0 | At start-up, this input should read 0 to indicate that the processor should start display mode. Afterwards, it is used as E signal for the display. |
| PB1 | R/W* signal for the display. |
| PB2 | A0 signal for the display. |
| PB3 | Common line for all digit only keys. The output is taken low when digit only keys are scanned. In matrix keyboard mode, this is row address 3. |
| PB4<br\><br\><br\> | Common line for digit + current keys. The output is taken low when digit + current keys are scanned.
When data has been shifted out on the SPI, it is latched by taking both PB3 and PB4 low. Since PB3 and PB4 may be shorted together if more than one key is pressed, PB3 and PB4 should be buffered in circuits using the SPI output. In matrix keyboard mode, this is row address 2. |
| PB5 | Handset and volume override. This output may be set to 1 or 0 by a command from the exchange. It is normally used to override handset off and volume control. |
| PB6 | Handset off input. 5V at input indicates handset off. |
| PB7 | ID control. Set to 1 while a digit is being sent. |
| PC0 | Key no. 8 input. Used as output to latch data into external shift registers when scanning keys. If 0V at reset, matrix keyboard mode is selected. |
| PC1 | Key no. 9 input. In matrix keyboard mode, this is an output, row address 1. |
| PC2 | OPEN/PRIVATE switch input. 5v at input means OPEN. |
| PC3 | M-key input. 0V at input means key pressed. In matrix keyboard mode, MICOM mode is selected if 0V at reset. |
| PC4 | C-key input. 0V at input means key pressed. In matrix keyboard mode, this is an output, row address 4. |
| PC5 | Handset current control. Taken low when either handset is off or handset off current is used together with digit. |
| PC6 | M-key current control. Set high when either M-key is pressed or m-key current is used with digit. |
| PC7 | C-key current control. Set high when either C-key is pressed or as a speed-up for m-key current. |
| PD0/RDI | Serial data input from exchange. 9600 baud, 8 bit data, 2 bit stop, no parity. |
| PD1/TDO | Serial data output. Data from the exchange may be transmitted here. 9600 baud, 8 bit data, 2 bit stop, no parity.
This pin can also be used as an output pin controlled by commands 0x26, 0x27,0x28, and 0x29 |
| PD2/MISO | Synchronous data input used to read key scan from external shift register. |
| PD3/MOSI | Synchronous data output. Data from the exchange may be shifted out on this output. After shifting, data is latched into external registers by taking both PB3 and PB4 low. The address is available on PA0..PA7 while strobing. |
| PD4/SCK | Clock output for synchronous input/output. Can be used to toggle watchdog. |
| PD5/SS* | Must be tied to 5V. |
| PD7 | cd-loop polarity sense input. 5V at input signals c-wire negative. |
| TCAP | Not used, should be tied to 0 or 5V. |
| TCMP | OPEN/PRIVATE current control and digit tone output. Square wave output of digit tone when sending digit, else 1 when in PRIVATE and 0 in OPEN. |
Non-Display mode
The pins are used as follows:
| Pin Name | Description |
|---|---|
| RESET | This is the reset input, the reset circuit is connected to this input. |
| OSC1,<br\> OSC2 | A 2.45MHz ceramic resonator is connected to these two pins. <br\> |
| VCC | The pin is connected to +5V. |
| GND | The pin is connected to 0V. |
| IRQ | The input is used to wake the processor if a key is pressed while the processor is in STOP condition. |
| PA0..PA7 | Inputs for key 0 .. key 7. Input at 0V means key pressed. In matrix keyboard mode, they are column 1-8 inputs. |
| PB0 | At start-up, this input should read 1 to indicate that the processor should start non-display mode. |
| PB1 | Not used. Tie to 0V or 5V. In matrix keyboard mode, it is used to activate private to supply extra current to the processor while a key is depressed. |
| PB2 | Output that is turned on to 5V when processor is running. Used to ensure that open keys reads as open. In three-state when processor is in STOP condition. |
| PB3 | Common line for all digit only keys. The output is taken low when digit only keys are scanned. In matrix keyboard mode, it is used as row 4 output. |
| PB4 | Common line for digit + current keys. The output is taken low when digit + current keys are scanned. In matrix keyboard mode, it is used as row 3 output. |
| PB5 | Not used, tie to 0V or 5V. If 0V at reset, matrix keyboard mode is selected. |
| PB6 | Not used, tie to 0V or 5V. If 0V at reset, and matrix keyboard mode is selected, MICOM mode keyboard is selected. |
| PB7 | ID control. Set to 1 while a digit is being sent. |
| PC0 | Key no. 8 input. In matrix keyboard mode, it is used as row 1 output. |
| PC1 | Key no. 9 input. In matrix keyboard mode, it is used as row 2 output. |
| PC2..PC5 | Key no. 16 .. key no. 19 input. Not used in matrix keyboard mode, and must be tied to 5V. |
| PC6 | M-key current control. Set high when m-key current is used with digit. |
| PC7 | Not used. Tie to 0V or 5V. In matrix keyboard mode, it is set high when C-key is pressed, and activates C-key current. |
| PD0..PD5 | Key no. 10 .. key no. 15 input. Not used in matrix keyboard mode, and must be tied to 5V. |
| TCAP | Not used. Tie to 0V or 5V. |
| TCMP | Digit tone output. Square wave output of digit tone when sending digit. |
Electrical operation
Keyboard scanning in display mode
The keyboard is a 2 x 30 switch matrix, giving two columns of 30 keys that is scanned one column at a time. The processor always scans 30 keys, but keys may be disabled by ensuring that they read as logic 1. The first column is selected by taking the PB3 pin low. The two first keys are read by reading level at the pins PC0 and PC1. Then the PC0 pin is made an output and taken high then low to latch the rest of the keys into external shift registers. The PB3 pin is taken high and the data in the external shift registers is shifted in through the processor's SPI port using the SCK output as clock. The clock is 306 kHz. After the keys has been decoded internally, the process is repeated for the second column, selecting the second column by taking PB4 pin low.
If an error is detected during scanning, that is, more than one key pressed at a time, the scanning may be aborted. An exception is M- and C-key in matrix keyboard mode.
The keys are placed as follows in the matrix: